Part I Nanofabrication in research labs:
This part will cover the main nanofabrication and characterization techniques used in clean-rooms in research laboratory and semi-industrial environments for the fabrication of current and future semiconductor devices. The principles of these techniques will be presented and illustrated through concrete examples obtained in the clean-rooms of the Minatech Campus in Grenoble. This course will provide you with the basics of technological steps, thin film deposition techniques, lithography processes, and advanced characterization used during the fabrication of single devices up to their large-scale integration.
Content :
Substrates/Materials (Si / Ge / SiGe / SOI / sSOI / Si28 / III-V….)
Course Description: This second part of the course describes the devices that are currently used and developed to sustain Moore’s law: it spans transistor technologies from bulk CMOS, to FinFET and FDSOI, with a discussion of their pros and cons and how they are manufactured at scale. It also describes the evolution of Moore’s law, the challenges associated with dimension scaling, and how integration paradigms have shifted in the past and are still evolving to sustain continuous improvement of integrated circuit performance. With a strong focus on current research trends, we will look at the state-of-the-art as well as to where the microelectronics industry is shifting to support both classical and quantum computing.
Learning Objectives:
Familiarity with the industrial microelectronic fabrication ecosystem
Foundation in the fundamentals of device scaling
Ability to read and evaluate research articles focused on VLSI
Understanding of the bridge between microelectronics and quantum computing
Published on February 27, 2021 Updated on June 27, 2026
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